Cerebras published the arithmetic, which almost nobody does. Its 22 October engineering post works out, step by step, how a 3-trillion-parameter model is split across wafer-scale chips, and ends at a specific number: 190 concurrent requests. Every step is shown. Recomputing them from the model’s own published config is where the answer moves, and it moves because of one of the three assumptions listed at the top.

The chain, recomputed

The worked example in Cerebras’s post uses Moonshot’s Kimi K3 and states its assumptions plainly: a 256k average request size, 4-bit weight quantisation “like the Hugging Face implementation”, and an 8-bit KV cache. From there:

  • 3 trillion parameters at 4 bits each is 1,500 GB.
  • Divided by 93 layers, about 16 GB per layer.
  • A wafer holds 44 GB, so two linear-attention layers fit per wafer and one full-attention layer per wafer plus its cache. 69 divided by 2 rounded up is 35 wafers; 24 full-attention layers are 24 more. Total 59.
  • A full-attention wafer has 44 minus 16, so 28 GB left for cache.
  • A 256k request needs 576 bytes per token per layer, which is 147 MB.
  • 28 GB divided by 147 MB is 190 concurrent requests.

The architectural inputs check out exactly. The Kimi K3 model card gives 2.8T total parameters, 104B activated, 93 layers and an attention composition of “69 KDA + 24 Gated MLA”, and the model’s config.json lists kda_layers with 69 entries and full_attn_layers with 24. The 16 GB per layer, the 59 wafers and the 28 GB of headroom all follow correctly from the stated premises.

One terminology note, because it looks like an error and is not: the model card’s own “Number of Dense Layers” field reads 1, referring to non-MoE feed-forward layers. Cerebras uses “dense layer” to mean a full-attention layer, and its count of 24 matches the card’s 24 Gated MLA layers. Same number, different word.

Where 576 comes from, and what it assumes

The post gives 576 bytes per token per layer without deriving it. It derives cleanly from the config: kv_lora_rank is 512 and qk_rope_head_dim is 64, summing to a 576-dimensional latent per token. At one byte per value, that is 576 bytes. The figure is the 8-bit cache assumption, expressed as a byte count.

At bfloat16, the precision the shipped config implies, the same latent is 1,152 bytes per token, a 256k request needs about 295 MB, and the same 28 GB of wafer headroom supports about 95 concurrent requests rather than 190. One assumption, half the answer.

That assumption is where Cerebras’s own two documents diverge. The blog post computes with an 8-bit cache. Cerebras’s inference documentation, describing what it serves, says the opposite: “Cerebras uses selective weight-only quantization only during storage to preserve maximal quality”, and then, explicitly, “The activations, attention, and kv cache remain in full precision and unquantized.” The model as shipped agrees with the docs rather than the blog: config.json sets kv_cache_scheme to None.

Neither document is dishonest, and the distinction matters. The blog labels its example “illustrative” and lists the 8-bit cache as an assumption in the third bullet of the post, before any arithmetic. The docs describe production hosted models. Documents written for different readers diverge, and this is the ordinary case. But the docs are what a customer is held to, so a reader who carries 190 away from the blog is carrying a number computed under a cache precision the same company’s documentation says it does not use.

The weights half of the assumption is better grounded, and worth saying so. The model card lists “MXFP4 weights / MXFP8 activations (quantization-aware training)”, so 4-bit weights are native to the model rather than something Cerebras imposed on it. That is the assumption doing the most work in the wafer count, and it holds.

One figure that runs the other way

Recomputing the weight payload from what Moonshot actually published rather than from a round 3T moves the number against Cerebras, not for it. The repository’s declared tensor total is 2.78T parameters at 1.561 TB of files, giving 16.78 GB per layer and 27.2 GB of wafer headroom rather than 28. The direction is unflattering to the post and the magnitude is trivial, roughly 3%, which is well inside what “about 16 GB” claims. It is a rounding, not a thumb on the scale.

What the second document says about the same number

Cerebras links, in its own post, Modal’s write-up of serving a trillion-parameter coding model. Modal’s finding is that on coding-agent traffic, served naively, “throughput and interactivity rapidly collapse above 6 concurrent users”, and that the highest interactivity in the benchmarks it cites “is achieved by a deployment with just eight GPUs per replica”.

That is not a rebuttal of 190, and reading it as one would be wrong twice over: Modal is measuring a different model (Kimi K2.6), on GPUs, and the figure of 6 describes the unoptimised baseline it then spends the post fixing. What it establishes is narrower and still useful. Concurrency at a given quality is a property of the traffic, not of the memory arithmetic, and the number a capacity calculation yields is a ceiling rather than a working point.

Cerebras says as much itself, in the sentence immediately after the 190: “neither concurrency nor batch size tells you exactly how efficiently an inference system performs”, preferring total token throughput per unit of power. The company’s own text demotes the figure this article has spent eight paragraphs recomputing. That concession is the most honest line in the post and it is not in the summary.

What a reader can and cannot check

Three things in the post are not checkable from anything published alongside it: the “1000-2000+ tokens per second” range, the roughly 2 microseconds per wafer-to-wafer hop, and any claim about delivered concurrency under real traffic. No benchmark accompanies the post, and none is cited for those figures. They may well be right; they are assertions here.

One availability note, since the example invites it. Kimi K3 appears on Cerebras’s model catalogue only under Dedicated Inference, the reserved-capacity enterprise tier. Shared Inference, the tier with published pricing and a free trial, lists two models: gpt-oss-120b and qwen-3.8-27b. The 59-wafer deployment is a worked example of what the architecture permits, not a description of something a reader can call today.

A minor obstacle for anyone wanting to repeat this: all ten equations in the post are images with empty alt attributes, so a text extract of the page returns the prose with every number missing, and the numerals are set in an accent colour that defeats a naive OCR pass. The figures above were read by isolating that colour channel. Worth knowing before concluding the arithmetic was omitted.